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Telelogic Modeling Community: Whitepapers - UML, C/C++, OO Programming

webinar    

Best Practices for Quick Closure of Verilog Designs
When you design ASIC you have to deal with the tangled reset circuits, multiple clock domains, power dissipation, and other complex issues. In this presentation we will discuss the best design practices for the proper reset circuit, avoiding glitches in cross domain data paths, special consideration for using gated clocks in your design, and some coding techniques for the most efficient verification of the design. Following these practices...
preview: http://www.aldec.com   date: 8/14/2008

webinar    

Cut Months and Millions from ASIC Design
Learn about a unique system development method that can dramatically reduce your ASIC-based system design’s time-to-market and total cost. In this 20-minute webcast, you’ll see how Altera’s ASIC development system provides: In-system, at-speed verification of both hardware and software The lowest risk approach to custom
preview: http://www.altera.com   date: 7/11/2008

webinar    

Design Rule Checking Tools: a Key to Avoiding ASIC Re-spins.
Design rule checking software detects a wide variety of design issues, such as poor coding styles, improper clock and reset management, synthesis problems, poor testability, etc. Recording and detailed analysis of detected issues is facilitated by variety of debugging tools. Implementing corrections suggested by the checking tools leads to faster delivery of better quality ASIC design. This webinar explores the advantages of Design Rule...
preview: http://www.aldec.com   date: 12/17/2008

webinar    

Implementing Large and Complex 65-nm ASICs in the Magma Flow
65-nanometer process technology advancements allow us to put more functionality into a single large, complex chip. As we pack hundreds of millions of transistors into a chip, increased EDA tool performance and integrated design flows are necessary to address all nanometer issues and effects. In this webinar, Fastrack Design describes the implementation of a high-performance, 65-nm ASIC using the Magma flow. Synthesis, virtual prototyping,...
preview: http://www.magma-da.com   date: 11/27/2007

overview    

Application-specific integrated circuit @ Wikipedia
An application-specific integrated circuit (ASIC) is an integrated circuit (IC) customised for a particular use, rather than intended for general-purpose use. For example, a chip designed solely to run a cell phone is an ASIC. In contrast, the 7400 series and 4000 series integrated circuits are logic building blocks that can be wired together to perform many different applications. Intermediate between ASICs and standard products are...
preview: http://en.wikipedia.org  

overview    

ASIC Overview
Overview to ASIC's (basic).
preview: http://www.radio-electronics.com  

overview    

FPGA's vs. ASIC's - What are the Trade Off's (Registration Required)
Designs that were done in ASICs in the past are done by FPGAs today, faster and for less cost. Complex FPGA design is driving new design approaches. ASIC designs are specialized, offer power and flexibility, and accommodate large designs where FPGA falls short. With so much at stake, where should your company's focus lie? Or is it more of a middle area - a place where structured ASIC can fill the gap?
preview: http://www.iec.org