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webinar   1-5 star rating for this site  
Evaluating Implementation Choices for Low-Power Digital Sound in SOCs
High-quality audio creates an immersive experience that excites buyers and spurs the purchase of consumer products such as home theater and PC sound systems, flat-panel televisions, handheld and console video games, portable music and video players, and mobile telephone handsets. As a result, digital audio has rocketed to the top of the critical features list for all sorts of products over the past several years. At the same time, the number...
Click here to preview in another window preview: http://www.techonline.com   date: 11/28/2007

webinar   1-5 star rating for this site  
Everything you know about Microprocessors is Wrong
Many system-engineering concepts and 'best practices' with respect to system design are no longer valid at the chip level. For example, bus-centric design--made popular by the introduction of the first commercial microprocessor in 1971--continues to dominate on-chip design 36 years later even though nanometer silicon has completely changed the rules of system interconnect.
Click here to preview in another window preview: http://seminar2.techonline.com   date: 11/14/2007

webinar   1-5 star rating for this site  
Understanding AMP and SMP MPSOC Architectures for Multimedia and Networking Applications
Two main forces drive MPSOC (multiple processor system on chip) development. The first is simple technology push. Moore’s Law continues unabated and we continue to be able to pack more transistors, hence more functions, into each mm2 of silicon. That means either building equivalent functions in less silicon—for reduced cost—or (more likely) adding functions while keeping the size of a silicon die constant. The second major force driving...
Click here to preview in another window preview: https://event.on24.com   date: 8/21/2008

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tutorial   1-5 star rating for this site   site recommendation - wow, cool, new
myCSoC: Design Explorations With Your Configurable System on a Chip
Triscend Corp. has developed a configurable system on a chip (CSoC) that combines programmable logic with an 8032 microcontroller core in a single device. Application software runs in the 8032 with assistance from peripherals built with soft modules in the programmable logic. Combined with their FastChip development software, you can now design systems where both the software and hardware can be changed at a moment's notice.
Click here to preview in another window preview: http://www.xess.com  

university   1-5 star rating for this site  
Berkeley Reconfigurable Architectures, Systems, and Software - BRASS
The emergence of high capacity reconfigurable devices is igniting a revolution in general-purpose processing. It is now becoming possible to tailor and dedicate functional units and interconnect to take advantage of application dependent dataflow. Early research in this area of reconfigurable computing has shown encouraging results in a number of spot areas including cryptography, signal processing, and searching
Click here to preview in another window preview: http://brass.cs.berkeley.edu  

project   1-5 star rating for this site  
Zippy - A Novel Dynamically Reconfigurable Processor
The ZIPPY project aims at the investigation and development of a dynamically reconfigurable embedded processor architecture. This architecture will integrate blocks of a novel adaptive computing structure with standard processor components such as CPU core, caches, on-chip memories, and controllers.
Click here to preview in another window preview: http://www.zippy.ethz.ch  

article   1-5 star rating for this site  
White Paper: The What, Why, and How of Configurable Processors
Nanometer ASIC design is a costly, risky business. While million-dollar mask costs get most of the attention from the technical press, mask costs are just the tip of the iceberg. Design costs for ASICs with tens or hundreds of millions of gates can easily cost $50 million or more. With those stakes, it makes sense to use every means possible to reduce the risk of design failure. Configurable processors can help your ASIC design team meet perfo...
Click here to preview in another window preview: http://www.embedded-computing.com   date: 7/31/2008 ULCLOGO

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