FPGA Tutorial: Free 'Insider's Guide' (2009 Edition)
Altera? Xilinx? FPGA boards or design tools as from Altium or Mentor Graphics? What do users and newbies think about new FPGA technologies? Find out in our free tutorial on FPGAs, tools, and boards.

Mocana NanoSSH - Embedded SSH Client and Server

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OpenFire Processor - Free Xilinx Microblaze Clone
The OpenFire soft processor is an open source Verilog implementation of the Xilinx MicroBlaze processor. Like the MicroBlaze, the OpenFire is a 32-bit RISC processor based on the DLX architecture by Hennessy and Patterson. The OpenFire was developed by Stephen Craven, a PhD student at Virginia Tech, specifically for configurable array research. As such, certain features of the MicroBlaze were not initially implemented. The original...
preview: http://www.ccm.ece.vt.edu  

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PacoBlaze - free soft core for Xilinx
PacoBlaze is a from-scratch synthesizable & behavioral Verilog clone of Ken Chapman's popular PicoBlaze embedded microcontroller. KCAsm is a lightweight PicoBlaze assembler written in Java. While Ken's version aims toward the most efficient implementation in the Xilinx FPGA architecture, PacoBlaze tries to be as configurable as possible, maintaining source code compatibility and code cycle accuracy with the original PicoBlaze. It also...
preview: http://bleyer.org  

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STM Free Microprocessor
STM is a 32-bit, 2-way superscalar RISC processor, designed in an HDL. It is a free hardware; get the source from here.
preview: http://www.asahi-net.or.jp  

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The JAM CPU - A CPU core in VHDL
The JAM CPU is a 32bit 5 stage pipelined RISC core with forwarding and hazard handling. Its basic design is derived from the DLX architecture (from the Patterson & Hennessy books). The JAM CPU core is implemented in VHDL and has been tested in an actual FPGA (the Xilinx Virtex chip). We have released our CPU core under the GNU Lesser General Public License (LGPL) in the hope that it will be useful for people studying VHDL or computer...
preview: http://www.digitalfanatics.org  

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FPGA CPU / last update 2003
The purpose of this site is to share the lore of designing custom processors and integrated systems-on-chips using FPGAs (field-programmable gate arrays). The XSOC Project - an unsupported collection of experimental hardware and software designs and specifications, cited in the Circuit Cellar magazine series, "Building a RISC System in an FPGA", and providing an example for the noble purpose of teaching computer design.
preview: http://www.fpgacpu.org   date: 2/5/2003

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JOP - Java Optimized Processor
This site is designated for a processor design to implement the Java Virtal Machine. It is part of a dissertation at the Technical University of Vienna, Austria. The goal of this development is a simple and small processor optimized to execute Java byte code. The processor core fits in a 'mainstream' FPGA. So it is possible to use a configurable Java processor for embedded applications.
preview: http://www.jopdesign.com  

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OpenCores
OpenCores is a loose collection of people who are interested in developing hardware, with a similar ethos to the free software movement. Currently the emphasis is on digital modules called 'cores', since FPGAs have reduced the incremental cost of a core to approximately zero.
preview: http://www.opencores.org